********************************************************************* Call for Participation 10th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2016) August 31 - September 2, 2016 Nara, Japan http://www.arc.ics.keio.ac.jp/nocs16 ********************************************************************* The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, chip-scale, and multichip package scale communication technology, architecture, design methods, applications and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation. NOCS 2016 will be held in Nara. It is well connected to Kyoto and Osaka. The nearest airport is Kansai International Airport, which is also well connected to many international cities. Nara was the capital of Japan about 1300 years ago. There are historical temples, shrine, palace, and forest encompassed as Historic Monuments of Ancient Nara. Advanced program, registration, and hotel reservation are available online. Please visit http://www.arc.ics.keio.ac.jp/nocs16. Keynote Talks ------------- - Near-Field Coupling Integration Technology Tadahiro Kuroda (Keio University, Japan) - Identifying On-Chip Communication Requirements for IOT Rob Aitken (ARM Inc., USA) Embedded Tutorial ----------------- - Inter/Intra-Chip Optical Interconnection Network: Opportunities, Challenges, and Implementations Jiang Xu (Hong Kong University of Science and Technology, Hong Kong) Shigeru Nakamura (NEC Corp., Japan) Advanced Program ---------------- First Day (August 31st, 2016) 09:00-10:00 (Keynote 1) - Near-Field Coupling Integration Technology Tadahiro Kuroda 10:30-12:30 (Regular Session 1) - Safe and Dynamic Traffic Rate Control for Networks-on-Chips Adam Kostrzewa, Selma Saidi, Sebastian Tobuschat, Rolf Ernst - Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores in Many Core Systems Xiaohang Wang, Amit Kumar Singh, Bing Li, Yang Yang, Terrence Mak - Tighter Time Analysis for Real-Time Traffic in On-Chip Networks with Shared Priorities Meng Liu, Matthias Becker, Moris Behnam, Thomas Nolte - Improving NoC Performance under Spatio-Temporal Variability By Runtime Reconfiguration: A General Mathematical Framework Yuankun Xue, Paul Bogdan 14:00-15:30 (Special Session 1) - Printed Circuits on Flexible Substrates: Opportunities and Challenges Tsung-Ching Huang, Kwang-Ting Cheng, Raymond Beausoleil - Extending Networks from Chips to Flexible and Stretchable Electronics Ujjwal Gupta, Umit Y. Ogras - Hybrid Large-Area Systems and their Interconnection Backbone Naveen Verma, L. Aygun, Y. Afsar, Y. Hu, L. Huang, T. Moy, J. Sanz-Robinson, W. Rieutort-Louis, S. Wagner, J. C. Sturm 16:00-17:00 (Regular Session 2) - PowerMax: An Automated Methodology for Generating Peak-Power Traffic in Networks-on-Chip Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos - TooT: An Efficient and Scalable Power-Gating Method for NoC Routers Hossein Farrokhbakht, Mohammadkazem Taram, Behnam Khaleghi, Shaahin Hessabi Second Day (September 1st, 2016) 09:00-10:00 (Keynote 2) - Identifying On-Chip Communication Requirements for IOT Rob Aitken 10:30-12:00 (Regular Session 3) - Populating and Exploring the Design Space of Wavelength-Routed Optical Network-on-Chip Topologies by Leveraging the Add-Drop Filtering Primitive Mahdi Tala, Marco Castellari, Marco Balboni, Davide Bertozzi - Sharing a Global On-Chip Transmission Line Medium without Centralized Scheduling Yashar Asgarieh, Bill Lin - Run-Time Laser Power Management in Photonic NoCs with On-Chip Semiconductor Optical Amplifiers Ishan Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha - Design of High Bandiwdth Photonic Network-on-Chip Architectures Using Optical Multilevel Signaling Tzyy-Juin Kao, Ahmed Louri 13:30-15:00 (Special Session 2) - Toward Exa-scale Photonic Switch System for the Future Datacenter Kiyo Ishii, Shu Namiki - Chip-scale Si-photonics optical transceiver for a photonics - electronics convergence system Kenichiro Yashiki, Yasuyuki Suzuki Mituru Kurihara, Yasuhiko Hagihara, Takahiro Nakamura - Flow-centric Computing Leveraged by Photonic Circuit Switching for the Post-Moore Era Ryousei Takano, Tomohiro Kudoh 15:30-17:00 (Embedded Tutorial) - Inter/Intra-Chip Optical Interconnection Network: Opportunities, Challenges, and Implementations Jiang Xu, Shigeru Nakamura Third Day (September 2nd, 2016) 09:00-10:30 (Special Session 3) - A Heuristic Method of Generating Diameter 3 Graphs for Order/Degree Problem Teruaki Kitasuka, Masahiro Iida - Average Shortest Path Length of Graphs of Diameter 3 Nobutaka Shimizu, Ryuhei Mori - Constructing Large-scale Low-latency Network from Small Optimal Networks Ryosuke Mizuno, Yawara Ishida 11:00-12:30 (Regular Session 4) - Multi-bit Transient Fault Control for NoC Links Using 2D Fault Coding Method Xiaowen Chen, Zhonghai Lu, Yuanwu Lei, Yaohua Wang, Shenggang Chen - A Built-In Self-Testing Framework for Asynchronous Bundled-Data NoC Switches Resilient to Delay Variations Gabriele Miorandi, Alberto Celin, Michele Favalli, Davide Bertozzi - The Synchronous vs. Asynchronous NoC Routers: An Apple-to-Apple Comparison between Synchronous and Transition Signaling Asynchronous Designs Masashi Imai, Thiem Van Chu, Kenji Kise, Tomohiro Yoneda 13:45-15:30 (Regular Session 5) - PROSA: Protocol-Driven NoC Architecture Miguel Gorgues Alonso, Jose Flich - Using Benes Networks at Fault Tolerant and Deflection Routing based NoCs Armin Runge, Reiner Kolla - Logic-Based Implementation of Fault-Tolerant Routing in 3D Network-on-Chips Behrad Niazmand, Siavoosh Payandeh Azad, Jose Flich, Thomas Hollstein, Jaan Raik, Gert Jervan - An Area-Efficient TDM NOC Supporting Reconfiguration for Mode Changes Rasmus Bo Sorensen, Luca Pezzarossa, Jens Sparso Organizing Committee -------------------- General Co-Chairs: - Hideharu Amano (Keio University, Japan) - Partha Pratim Pande (Washington State University, USA) Technical Program Co-Chairs: - Hiroki Matsutani (Keio University, Japan) - Sriram Vangal (Intel, USA) Publicity Co-Chairs: - John Kim (Korea Advanced Institute of Science and Technology, Korea) - Turbo Majumder (Intel, USA) - Maurizio Palesi (Kore University, Italy) Publication Chair: - Umit Ogras (Arizona State University, USA) Industry Chair: - Yuichiro Ajima (Fujitsu Limited, Japan) Special Sessions Co-Chairs: - Michihiro Koibuchi (National Institute of Informatics, Japan) - Sudeep Pasricha (Colorado State University, USA) Tutorial Chair: - Paul Bogdan (University of Southern California, USA) Finance Chair: - Ikki Fujiwara (National Institute of Informatics, Japan) Registration Chair: - Takashi Nakada (University of Tokyo, Japan) Local Arrangements Chair: - Shinya Takamaeda (Nara Institute of Science and Technology, Japan) Steering Committee Chair: - Radu Marculescu (Carnegie Mellon University, USA) *********************************************************************