Call for Papers
Call for Participation - [TXT]
Call for Regular Papers - [PDF / TXT]
Call for Special Session and Demo Proposals - [PDF]
The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, chip-scale, and multichip package scale communication technology, architecture, design methods, applications and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation. Topics of interest include, but are not limited to:
NoC Architecture and Implementation
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NoC Application
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Novel NoC Technologies
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NoC at the Un-Core and System-level
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NoC Analysis and Verification
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On-Chip Communication Optimization
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Off-Chip and Rack-Level Communication
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Submission Rules
Electronic paper submission requires a full paper, up to 8 double-column IEEE format pages, including figures and references. The program committee in a double-blind review process will evaluate papers based on scientific merit, innovation, relevance, and presentation. Submitted papers must describe original work that has not been published before or is under review by another conference or journal at the same time. Each submission will be checked for any significant similarity to previously published works or for simultaneous submission to other archival venues, and such papers will be rejected. Proposals for special sessions and demos are invited. Paper submissions and demo proposals by industry researchers or engineers to share their experiences and perspectives are also welcome. Please refer to the submission page for more detailed submission instructions for paper submissions, special session, and demo proposals.
Important Dates
Abstract registration deadline |    FIRM DEADLINE! | |
Full paper submission deadline | |
   FIRM DEADLINE! |
Notification of acceptance | ||
Final version due | August 1st, 2017 |